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- W1904202318 abstract "High frequency digital-analog (DACs) requiring an output buffer find a speed limitation in the overall input capacitive load of the buffer. An active scheme for the compensation of such a load, including the parasitic capacitances coming from reversely biased junctions associated with analog switches is presented. Computer simulations on a given architecture (10-b DAC) show the effectiveness of the proposed approach. >" @default.
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- W1904202318 date "2002-12-30" @default.
- W1904202318 modified "2023-09-24" @default.
- W1904202318 title "Active compensation of parasitic capacitances for very high frequency CMOS DACs" @default.
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- W1904202318 doi "https://doi.org/10.1109/iscas.1993.393945" @default.
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