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- W1906350320 abstract "Systems Modeling Language (SysML) is used to capture systems design as descriptive and analytical system models, which relate text-based requirements to the system design model and provide an infrastructure to support analysis and verification. However, SysML is not a methodology, nor a method. This opens-up discussions of how to utilize SysML provided infrastructure to successfully achieve analysis and verification objectives in the context of a particular engineering problem. In this paper a new approach of how model of the system, expressed with sufficient precision in SysML, can be used to support early requirements validation and design verification, particularly when coupled with standard-based execution and simulation environment, is introduced." @default.
- W1906350320 created "2016-06-24" @default.
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- W1906350320 date "2015-09-01" @default.
- W1906350320 modified "2023-09-30" @default.
- W1906350320 title "An approach: SysML-based automated requirements verification" @default.
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- W1906350320 doi "https://doi.org/10.1109/syseng.2015.7302739" @default.
- W1906350320 hasPublicationYear "2015" @default.
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