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• W1907514503 abstract "The author presents a parallel architecture for high-speed data compression based on textual substitution using a sliding window. The architecture combines a systolic array with trees for data broadcast and reduction. Compression involves two steps. First, a match generator computes in parallel the maximal matches available at each position of the input. The generator uses a systolic array to hold the dictionary, a pipelined broadcast tree to deliver each input character simultaneously to every array cell, and a reduction tree to identify the largest available match each cycle. From this information a second process selects a match sequence exactly covering the input. Decoding mirrors encoding. The tree interconnect provides through-delay proportional to the log of the dictionary size, and pipelining reduces the effective per-character processing time to a single system cycle. A system data rate of 300 Mbit/sec is easily attainable. The author discusses layout issues arising from the tree interconnect. >" @default.
• W1907514503 created "2016-06-24" @default.
• W1907514503 creator A5056275243 @default.
• W1907514503 date "2002-12-04" @default.
• W1907514503 modified "2023-09-25" @default.
• W1907514503 title "A broadcast/reduce architecture for high-speed data compression" @default.
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• W1907514503 doi "https://doi.org/10.1109/spdp.1990.143529" @default.
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