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- W1919542972 abstract "A novel EEPROM memory cell with new program and erase operations fabricated by standard CMOS logic process is presented. The cell which consists of two N-Type MOSFET transistors in series is programmed by select gate controlled channel hot hole and erased by channel hot electron injection along with more than 10/sup 5/ cycles of endurance and 1000 hours of data retention at 150/spl deg/C. Without an additional P-well or N-well serving as the coupling gate, the area of a bit can be as small as 8F/sup 2/, the smallest area reported for single-poly EEPROM cells." @default.
- W1919542972 created "2016-06-24" @default.
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- W1919542972 date "2004-03-02" @default.
- W1919542972 modified "2023-10-17" @default.
- W1919542972 title "New single-poly EEPROM with cell size down to 8F/sup 2/ for high density embedded nonvolatile memory applications" @default.
- W1919542972 doi "https://doi.org/10.1109/vlsit.2003.1221102" @default.
- W1919542972 hasPublicationYear "2004" @default.
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