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- W1923300244 abstract "Along with the fast development of dual threshold voltage (dual-V/sub t/) technology, it is possible to use it to reduce static power in low-voltage high-performance circuits. In this paper we present a new signal-path level circuit model and an algorithm based on the new circuit model which introduces the concept of extracting sub-circuits. Experimental results show that, for the ISCAS85 benchmark circuits, our algorithm produces a significant leakage-power reduction similar to the transistor level dual-V/sub t/ assignment, but the computational cost is comparative to gate level dual-V/sub t/ assignment." @default.
- W1923300244 created "2016-06-24" @default.
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- W1923300244 date "2005-12-13" @default.
- W1923300244 modified "2023-09-24" @default.
- W1923300244 title "Signal-path level assignment for dual-V/sub t/ technique" @default.
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- W1923300244 doi "https://doi.org/10.1109/rme.2005.1543007" @default.
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