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- W1927049361 abstract "Scaled CMOS technology gives rise to submicron devices. In such devices short-channel effects lead to shifts in threshold voltage, increased mismatch and noise. The velocity saturation limits the obtainable transconductance and hence also the high speed performance. Lower supply voltages require the operational amplifier building block to operate rail-to-rail. In delta-sigma converters this leads to very-low-power converters. Considerable attention goes to circuit design for telecommunication applications, in which the inductor is making a comeback. The ultimate challenge of analog design however is the cointegration with digital blocks, causing coupling noise and requiring sophisticated tools." @default.
- W1927049361 created "2016-06-24" @default.
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- W1927049361 date "2002-12-23" @default.
- W1927049361 modified "2023-09-23" @default.
- W1927049361 title "Analog circuit design in scaled CMOS technology" @default.
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- W1927049361 doi "https://doi.org/10.1109/vlsic.1996.507696" @default.
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