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- W1936661359 abstract "Launching a satellite is a high cost mission. However, nowadays, low-mass and low-cost satellites are being developed to reduce mission costs, above all the scientific and educative ones. This thesis focuses on the study of one of the components of a femtosatellite designed and build at EETAC university. The component to be analyzed is the microprocessor. In order to meet the low cost requirements, those satellites must be built with COTS technology. The positive point of that technology is that it is affordable to anyone, in terms of economical aspects and readily availability. Nevertheless, it is not optimum to operate in the space environment, since it is not qualified and thus, its survivability is unknown. Once the existent problem of the COTS technology has been presented, the goal of this thesis is to achieve a certain space qualification level. The microprocessor Atmega 168 will be the analyzed COTS component. Future missions and potential applications are firstly analyzed in order to space- qualify the microprocessor. After that, the issues regarding to all the mission phases (pre-launch, launch, and orbit operations) are studied. This will help us to determine what are the harmful effects on the microprocessor. When all the effects that the microprocessor must deal with have been analyzed, the steps to obtain a certain space qualification are addressed. The basic procedures are defined by the corresponding TRA for each TRL. From TRA documentation, the proper tests and simulations are chosen within a realistic environment. The tests are a thermal vacuum laboratory experiment and a radiation exposure analysis, simulating the Van Allen belts, using the commercial software packages FLUKA and SPENVIS. Theoretical background to support the experiments and simulations are previously provided. Finally, after testing the microprocessor, the TRL level reached by it can be determined. Therefore, TRL 1 and TRL 2 are clearly achieved, since potential applications of the physical concept are developed. Given all that, we can conclude that the microprocessor has achieved TRL level 3. It passed all the tests and simulations conducted in this thesis. Nonetheless, TRL 4 is not achievable because Integration between satellite components must be tested. The integration of components is out of the scope of this thesis." @default.
- W1936661359 created "2016-06-24" @default.
- W1936661359 creator A5091099431 @default.
- W1936661359 date "2012-07-24" @default.
- W1936661359 modified "2023-09-28" @default.
- W1936661359 title "Validation activities of a microprocessor for space applications" @default.
- W1936661359 hasPublicationYear "2012" @default.
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