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- W1961197866 abstract "This paper presents an efficient flexible resampling architecture for parallel particle filtering. The architecture incorporates distributed, delayed resampling mechanisms for fast resampling processing. The architecture consists up to four resampling units and 16 processing elements. Their interconnection can be dynamically reconfigured. The architecture is designed and evaluated for bearing tracking example. The architecture is designed for 0.25 /spl mu/m CMOS technology." @default.
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- W1961197866 date "2004-08-13" @default.
- W1961197866 modified "2023-09-24" @default.
- W1961197866 title "A flexible resampling mechanism for parallel particle filters" @default.
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- W1961197866 doi "https://doi.org/10.1109/vtsa.2003.1252610" @default.
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