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- W1963517232 abstract "The characteristics of individual protection circuit elements, the npn and the NMOS transistors, in a 0.8 μm BiCMOS technology have been evaluated, and their use in ESD protection circuits have been discussed in some detail. Both the output and input protection circuits have been developed using npn transistors as the primary protection elements. The design requirements and limitations of these circuits are analyzed. ESD thresholds of > 4kV have been obtained for both input and output buffers in this technology." @default.
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- W1963517232 date "1993-12-01" @default.
- W1963517232 modified "2023-09-27" @default.
- W1963517232 title "An investigation of BiCMOS ESD protection circuit elements and applications in submicron technologies" @default.
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- W1963517232 doi "https://doi.org/10.1016/0304-3886(93)90006-s" @default.
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