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• W1965020647 abstract "Abstract E/D InP MISFETs with anodic Al 2 O 3 /native oxide double-layer for gate insulator with nanometer thick native oxide layer are fabricated by anodization processes in electrolyte and in oxygen plasma. Such gate structure greatly improves the device performance; high effective electron mobilities of 1500–3000 cm 2 /V. sec and marked reduction of drain current instability were simultaneously achieved. This is consistent with the interface properties measured by C-V analyses. InP MISFET E/D inverters as well as ring osillators are fabricated to demonstrate the capability of the process employed. The successful stable and high-speed operation of the ring oscillator as well as the inverter indicates great potential of the present technology for LSI/VLSI applications with nanometer device dimensions." @default.
• W1965020647 created "2016-06-24" @default.
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• W1965020647 date "1984-10-01" @default.
• W1965020647 modified "2023-09-27" @default.
• W1965020647 title "InP double-layer gate MISFET technology for VLSIs" @default.
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• W1965020647 doi "https://doi.org/10.1016/0167-9317(84)90066-2" @default.
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