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- W1965542006 abstract "The trade-off and process consideration for the scalable usage of poly-Si buffer LOCOS (PBL) technology has been studied. By using a proper stack layer of pad-oxide/poly-Si/nitride, an available and reliable PBL process for scalable device isolation can be achieved. A dual mechanism for pit formation is proposed. As the thermal stress is too large to be sustained by the pad poly-Si, stress-induced voids are found in the poly-Si layer after field oxidation. The residual stress would considerably damage the pad oxide, eventually leading to pit formation at the mostly stressed active area while removing the pad poly-Si. On the other hand, when the stress is not sufficiently high, the pad poly-Si is just subject to stress-enhanced oxy-nitridation. A proper etching control can be employed to retain the integrity of Si substrates. As results, thicker nitride induces larger stress and thus much more easily causes pit formation. Moreover, thicker pad poly-Si can sustain larger stress, but degrade the drain-induced barrier lowering for the field isolation device. Hence, the choice of the PBL stack layer is of great importance to reduce the bird's beak encroachment and alleviate the pit formation as well as retain the gate oxide integrity and the isolation performance." @default.
- W1965542006 created "2016-06-24" @default.
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- W1965542006 date "1999-11-01" @default.
- W1965542006 modified "2023-10-18" @default.
- W1965542006 title "Trade-off and process consideration for scalable poly-Si buffered LOCOS technology" @default.
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- W1965542006 doi "https://doi.org/10.1016/s0038-1101(99)00163-x" @default.
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