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- W1967398621 abstract "Although there have been many reported implementations of networks-on-chip (NoCs) on FPGAs, they have not seen the same acceptance as NoCs on ASICs. One reason is that communication on a field programmable gate array (FPGA) is already costly because of the die resources and time delays inherent in the reconfigurable structure. Layering another general-purpose network on top of the reconfigurable network simply incurs too many performance penalties. There is, however, already a largely unused, global network available in FPGAs. As a proof-of-concept, we demonstrate that the Xilinx FPGA configuration circuitry, which is normally idle during system operation, can function as a relatively high-performance NoC. MetaWire performs transfers through an overclocked Virtex-4 internal configuration access port and is shown to provide a bandwidth exceeding 200 MB/s." @default.
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- W1967398621 date "2010-05-01" @default.
- W1967398621 modified "2023-09-26" @default.
- W1967398621 title "MetaWire: using FPGA configuration circuitry to emulate a network-on-chip" @default.
- W1967398621 cites W2125662502 @default.
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- W1967398621 doi "https://doi.org/10.1049/iet-cdt.2009.0009" @default.
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