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- W1971290681 abstract "A high-speed GaAs monolithic integrated decision circuit for Gbit/s optical repeaters, based on source coupled FET logic (SCFL) and designed to be completely ECL-compatible, has been developed. A clock phase margin of 150 degrees at 2 Gbit/s and IC yields of about 60% are achieved by using SCFL configuration. The developed IC operates stably from 10 to 60°C ambient temperature over a supply voltage fluctuation of more than 2 V." @default.
- W1971290681 created "2016-06-24" @default.
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- W1971290681 date "1983-01-01" @default.
- W1971290681 modified "2023-09-27" @default.
- W1971290681 title "High-speed GaAs SCFL monolithic integrated decision circuit for Gbit/s optical repeaters" @default.
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- W1971290681 doi "https://doi.org/10.1049/el:19830668" @default.
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