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- W1971767939 abstract "A possible design alternative to improve the performance of a multiprocessor system is to insert a private cache between each processor and the shared memory. The caches act as high-speed buffers, reducing the memory access time, and affect the delays caused by memory conflicts. In this paper, we study the performance of a multiprocessor system with caches. The shared memory is pipelined and interleaved to improve the block transfer rate, and assumes an L-M organization, previously studied under random word access. An approximate model is developed to estimate the processor utilization and the speedup improvement provided by the caches. These two parameters are essential to a cost-effective design. An example of a design is treated to illustrate the usefulness of this investigation." @default.
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- W1971767939 date "1981-09-01" @default.
- W1971767939 modified "2023-10-12" @default.
- W1971767939 title "Performance of cache-based multiprocessors" @default.
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- W1971767939 doi "https://doi.org/10.1145/1010629.805489" @default.
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