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- W1974609570 abstract "We demonstrated a novel three-terminal tunnel device, the Surface Tunnel Transistor (STT), in which lateral interband tunneling current between source and drain is controlled by a gate voltage. The STT consists of a highly degenerate drain whose polarity is opposite that of the source, a channel with an insulated gate, and a source connected to the channel. The basic characteristics of the STTs were investigated by fabricating three types of STTs with mesa structures using a GaAs/AlGaAs system, as well as by a two-dimensional device simulation. An enhancement-type STT (E-STT) in which no electrons are accumulated on the channel surface at thermal equilibrium exhibited unsaturated transistor characteristics due to interband tunneling under source-drain reverse bias conditions. To increase the current density, a modulation doped STT (MD-STT) in which the channel was formed by modulation doping was also fabricated, and a tunneling current about 10 4 times larger than that of the E-STT was obtained. Moreover, the MD-STT showed negative differential resistance (NDR) characteristics under source-drain forward bias conditions. A channel doped STT (CD-STT) in which the channel region was directly doped with donors showed improved NDR characteristics with a peak current density of 3.7 µA/µm and a peak-to-valley current ratio (PVR) of 1.5 at room temperature. These values are larger than those of the MD-STT by a factor of 10 3 and 1.5, respectively. Furthermore, a PVR as high as 4.8 was obtained for the CD-STT by inserting a blocking layer between the drain and the overlapped channel layer to reduce the valley current." @default.
- W1974609570 created "2016-06-24" @default.
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- W1974609570 date "1996-03-01" @default.
- W1974609570 modified "2023-09-24" @default.
- W1974609570 title "Surface Tunnel Transistor: Gate-Controlled Lateral Interband Tunneling Device" @default.
- W1974609570 doi "https://doi.org/10.1143/jjap.35.1668" @default.
- W1974609570 hasPublicationYear "1996" @default.
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