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- W1978401104 endingPage "1238" @default.
- W1978401104 startingPage "1226" @default.
- W1978401104 abstract "Recent trends of aggressive technology scaling have greatly exacerbated the occurrences and impact of faults in computing systems. This has made ‘reliability’ a first-order design constraint. To address the challenges of reliability, several techniques have been proposed. This paper provides a survey of architectural techniques for improving resilience of computing systems. We especially focus on techniques proposed for microarchitectural components, such as processor registers, functional units, cache and main memory etc. In addition, we discuss techniques proposed for non-volatile memory, GPUs and 3D-stacked processors. To underscore the similarities and differences of the techniques, we classify them based on their key characteristics. We also review the metrics proposed to quantify vulnerability of processor structures. We believe that this survey will help researchers, system-architects and processor designers in gaining insights into the techniques for improving reliability of computing systems." @default.
- W1978401104 created "2016-06-24" @default.
- W1978401104 creator A5012290807 @default.
- W1978401104 creator A5061838490 @default.
- W1978401104 date "2016-04-01" @default.
- W1978401104 modified "2023-09-27" @default.
- W1978401104 title "A Survey of Techniques for Modeling and Improving Reliability of Computing Systems" @default.
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