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- W1981431504 abstract "This paper proposed DLMS algorithm which is suitable for real-time signal processing. The algorithm adopts hardware multiplier and pipeline technology to accelerate the operation of the system. By analyzing the time sequence and spectrum of the output signals, the attenuation of the interference signals is about 51dB. It can further demonstrate the high quality and high speed of the DLMS algorithm to filter out the interference signals, and well handle the relationship between the resources and speed of FPGA to meet the requirements of high-speed signal processing." @default.
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- W1981431504 date "2012-06-01" @default.
- W1981431504 modified "2023-09-27" @default.
- W1981431504 title "Design Method of DLMS Adaptive Filter Based on FPGA" @default.
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- W1981431504 doi "https://doi.org/10.4028/www.scientific.net/amm.182-183.685" @default.
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