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- W1982109096 abstract "In this paper we present a new paradigm of hierarchical smart-pixel arrays together with an example for feature extraction and compressed on-chip storage of the input pattern. A prototype with 16 × 16 pixels has been designed and tested. It consists of two different types of cells which are arranged in hierarchical layers similar to a quadtree structure. Main features of this prototype are edge detection and simplified on-chip storage of the optical input pattern." @default.
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- W1982109096 date "1997-06-01" @default.
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- W1982109096 title "A hierarchical smart-pixel array for feature extraction with on-chip storage" @default.
- W1982109096 cites W2134683755 @default.
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- W1982109096 doi "https://doi.org/10.1016/s0924-4247(97)80277-4" @default.
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