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- W1982763467 abstract "This paper gives a tutorial on system level design methodologies for system LSI, or System-On-Chip (SOC) designs and discusses about formal verification technologies targeting such system level specification/design descriptions. As a representative of system level specification/design language, we pick up SpecC language and introduce its associated design methodology for SOC designs. Although there are other system level specification/design languages, such as SystemC, the presented design methodology is basically shared with them. We also give an overview of the formal verification technology which can verify system level specification/design descriptions including verification of both hardware and software." @default.
- W1982763467 created "2016-06-24" @default.
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- W1982763467 date "2003-01-01" @default.
- W1982763467 modified "2023-09-27" @default.
- W1982763467 title "System level design methodologies from the viewpoint of formal verification" @default.
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- W1982763467 doi "https://doi.org/10.1109/icasic.2003.1277479" @default.
- W1982763467 hasPublicationYear "2003" @default.
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