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- W1983570530 abstract "This work presents a resource efficient implementation of T-Box module of Advanced Encryption Standard (AES) on Xilinx's Virtex-5 Field Programmable Gate Array (FPGA). The proposed architecture utilizes the 100% capacity of FPGA's dedicated Block RAM (BRAM) as compared to conventional techniques, where the consumption of BRAM memory is from 25% to 50%. The results show that the module fits into 4 BRAMs, thus reducing on device resources by 50%." @default.
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- W1983570530 date "2010-04-01" @default.
- W1983570530 modified "2023-09-26" @default.
- W1983570530 title "Resource efficient implementation of T-Boxes in AES on Virtex-5 FPGA" @default.
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- W1983570530 doi "https://doi.org/10.1016/j.ipl.2010.03.004" @default.
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