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- W1983632912 abstract "Abstract ESD protection concepts have to guarantee the required ESD hardness considering possible stress paths between every two pins of a circuit. It was found that all commonly used protection circuit concepts cause a circuit stress for a part of the relevant stress combinations. In these cases, the discharge is not shunted effectively by the protection circuits. Overvoltages appear at output and input transistors, parasitic elements or internal circuit parts. The last effect was found to be caused by forward biased diode structures which divert the discharge current to the supply lines. To avoid stress or damage of the circuit, each path between inputs/outputs and supply lines has to be protected effectively. A new type of protection concept is presented which prevents circuit stress." @default.
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- W1983632912 date "1992-12-01" @default.
- W1983632912 modified "2023-09-27" @default.
- W1983632912 title "A new ESD protection concept for VLSI CMOS circuits avoiding circuit stress" @default.
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- W1983632912 doi "https://doi.org/10.1016/0304-3886(92)90004-d" @default.
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