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• W1985598982 abstract "Bang-bang clock and data recovery (BBCDR) circuits are hard nonlinear systems due to the nonlinearity introduced by the binary phase detector (BPD). In this paper, jitter transfer and jitter tolerance of the second-order BBCDR are characterized by the Fourier series analysis and formulating the time domain waveforms. As a result, a new equation is presented to obtain corner frequency. Also, the jitter tolerance is expressed in a closed form as a function of loop parameters. The presented method is general enough to be used for designing the BBCDR. System level simulation is used to validate the analytical results with particular emphasis on jitter transfer and tolerance characteristics. The experiments all show excellent conformance between analytical equations and simulation results." @default.
• W1985598982 created "2016-06-24" @default.
• W1985598982 creator A5011973462 @default.
• W1985598982 creator A5072768224 @default.
• W1985598982 date "2013-01-01" @default.
• W1985598982 modified "2023-09-26" @default.
• W1985598982 title "Modeling of Jitter in Bang-Bang CDR With Fourier Series Analysis" @default.
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• W1985598982 doi "https://doi.org/10.1109/tcsi.2012.2215787" @default.
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