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- W1986141156 abstract "This paper proposes a PDN design method using frequency-dependent target impedance considering frequency properties of jitter sensitivity of the IO buffer to power supply noise and switching current profile. We confirmed that this design and the resulting jitter of the I/O interface attributable to power supply noise meet the target value of less than 5 %UI." @default.
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- W1986141156 date "2013-11-01" @default.
- W1986141156 modified "2023-09-24" @default.
- W1986141156 title "Power distribution network design method based on frequency-dependent target impedance for jitter design of memory interface" @default.
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- W1986141156 doi "https://doi.org/10.1109/icsj.2013.6756114" @default.
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