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- W1987070147 abstract "PLL (Phase Locked Loop) based frequency synthesizers are widely used in the wireless communication field. This paper puts focus on the design and implementation of a 60dB SNR (Signal to Noise Ratio) FM transmitter, which realizes direct frequency modulation of audio signal by utilizing a carrier frequency ranging from 78MHz to 108MHz, with a 100 kHz channel selection resolution. Fabricated in standard 0.35μm CMOS technology, this PLL's core circuit takes an area of 745×700 μm <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> . The transmitter has a total power consumption of below 56mW for a 3V supply, and the strongest measured spur is below -50dBc." @default.
- W1987070147 created "2016-06-24" @default.
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- W1987070147 date "2010-09-01" @default.
- W1987070147 modified "2023-09-26" @default.
- W1987070147 title "A low noise PLL based FM audio transmitter in 0.35 μm CMOS technology" @default.
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- W1987070147 doi "https://doi.org/10.1109/primeasia.2010.5604927" @default.
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