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- W1987282452 abstract "In this work, a novel asynchronous combinational S-Box (substitution box) design for AES (Advanced Encryption Standard) cryptosystems is proposed and validated. The S-Box is considered as the most critical component in AES crypto-circuits since it consumes the most power and leaks the most information against side-channel attacks. The proposed design is based on a delay-insensitive logic paradigm known as Null Convention Logic (NCL). The proposed NCL S-Box provides considerable benefits over existing designs since it consumes less power therefore suitable for energy-constrained mobile crypto-applications. It also emits less noise and has flatter power peaks therefore leaks less information against side-channel attacks such as differential power/noise analysis. Functional verification, analog simulation and power measurement of NCL S-Box have been done using Mentor Graphics EDA (Electronic Design Automation) tools to assure low-power side-channel attack-resistant operation of the proposed clock-free AES S-Box design." @default.
- W1987282452 created "2016-06-24" @default.
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- W1987282452 date "2010-05-16" @default.
- W1987282452 modified "2023-09-26" @default.
- W1987282452 title "Low-power side-channel attack-resistant asynchronous S-box design for AES cryptosystems" @default.
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- W1987282452 doi "https://doi.org/10.1145/1785481.1785587" @default.
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