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- W1992604845 abstract "A novel technique is described for fabricating silicon gate NMOSFET's having self‐aligned contacts to source, drain, gate, polysilicon line, and diffused line. By employing silicon nitride as a mask in various steps of the process, contact holes were formed by selective oxidation instead of the conventional technique of etching contacts. Diffusion techniques were employed for doping the conductive regions. Electrical properties of the devices are described. The reduction obtained in the size of the individual FET's and the chip area of VLSI circuits by employing this technique are illustrated." @default.
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- W1992604845 date "1981-06-01" @default.
- W1992604845 modified "2023-10-18" @default.
- W1992604845 title "A Self‐Aligned Contact MOS Process for Fabricating VLSI Circuits" @default.
- W1992604845 doi "https://doi.org/10.1149/1.2127630" @default.
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