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W1993194016 abstract "In this paper, we propose an efficient residue generator which concurrently computes the residues modulo 2 n +1 and modulo 2 n -1. The input operands are divided into n-bit vectors which are then grouped into two sets and added by two separate Carry Save Adder (CSA) trees. The output carry of each stage of the first CSA tree is used as input to the corresponding stage of the second CSA tree, while the output vectors of the trees are finally added modulo 2 n +1 and 2 n -1 to compute the residues. The proposed residue generator is well suited for Residue Number System (RNS) based applications which use both modulo 2 n +1 and 2 n -1 residues. An efficient configurable modulo 2 n ±1 residue generator is also proposed." @default.
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W1993194016 date "2013-10-01" @default.
W1993194016 modified "2023-09-23" @default.
W1993194016 title "On the design of modulo 2n±1 residue generators" @default.
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W1993194016 doi "https://doi.org/10.1109/vlsi-soc.2013.6673241" @default.
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