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- W1993358776 abstract "A new frequency synthesizer with low-power and short settling time is introduced. With two-point channel controls for an integer-N PLL, we have achieved a near zero settling time for any frequency change in 2.4GHz ZigBee band. By utilizing a vertical-NPN parasitic transitor for the VCO biasing, the close-in phase noise has been improved by 5dB from the case of MOS biasing. A modified-TSPC topology is proposed for low-voltage frequency divider circuits. Using the 1.2V supply voltage for 0.18μm CMOS, the power consumption is only 4.2mW and the phase noise is-116.5dBc/Hz at 1MHz offset." @default.
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- W1993358776 date "2006-06-01" @default.
- W1993358776 modified "2023-10-17" @default.
- W1993358776 title "4.2W CMOS Frequency Synthesizer for 2.4GHz ZigBee Application with Fast Settling Time Performance" @default.
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- W1993358776 doi "https://doi.org/10.1109/mwsym.2006.249558" @default.
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