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- W1996535690 abstract "This letter for the first time proposes a hybrid P/N substrate as a poly-Si p-channel for junctionless thin-film transistor (JL-TFT) with nanowires and omega-gate structures. The hybrid P/N JL-TFT exhibits a high ION/IOFF current ratio (>10 <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>7</sup> ), a steep subthreshold swing of 64 mV/dec, and a low drain-induced barrier lowering value of 3 mV/V by reducing the effective channel thickness that is caused by the channel/substrate junction. In addition, the series resistance for novel P/N JL-TFT with channel thickness (T <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>ch</sub> ) of 24 nm is 50 times smaller than conventional JL-TFT with T <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>ch</sub> = 12 nm. This hybrid P/N structure can break through the strict limitation of JL-TFT channel thickness." @default.
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- W1996535690 date "2015-02-01" @default.
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- W1996535690 title "Characteristics of a Novel Poly-Si P-Channel Junctionless Thin-Film Transistor With Hybrid P/N-Substrate" @default.
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- W1996535690 doi "https://doi.org/10.1109/led.2014.2379673" @default.
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