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- W1998432998 abstract "This paper presents a compact and semi-empirical model for a four-terminal (independent top and bottom gates) junction field-effect transistor (JFET). The model describes the steady-state characteristics for all bias conditions with a unified equation. Moreover, the model provides a high degree of accuracy and continuity for the different operation regions, a critical factor for robust analog circuit simulations. Capacitance modeling is also included to describe the JFET small-signal behavior. The model has been implemented in Cadence framework via Verilog-A and compared with data measured from JFETs used at Texas Instruments." @default.
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- W1998432998 date "2006-03-01" @default.
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- W1998432998 title "A new model for four-terminal junction field-effect transistors" @default.
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- W1998432998 doi "https://doi.org/10.1016/j.sse.2006.01.001" @default.
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