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• W1998706633 abstract "The floorplanning is a critical phase in very large-scale integrated-circuit(VLSI) phsical design. It determines the topology of layout, and it aims to arrange a set of rectangular modules on a chip so as to optimize the chip area, wirelength, etc. This problem is known to be NP-hard, and has received much attention in recent years. B*-tree representation is adopted in this paper. Based on the concept of evolutionary algorithm and simulated annealing, a hybrid evolutionary algorithm(ESA) is proposed. It is effective to explore solution space and locate the optimalsolution.The effectivenessof our method is demonstrated on several cases of MCNC benchmarks." @default.
• W1998706633 created "2016-06-24" @default.
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• W1998706633 date "2010-12-01" @default.
• W1998706633 modified "2023-09-22" @default.
• W1998706633 title "A Hybrid Evolution Algorithm for VLSI Floorplanning" @default.
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• W1998706633 doi "https://doi.org/10.1109/cise.2010.5676951" @default.
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