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- W2000226983 abstract "This paper describes a reduced-instruction-set computer (RISC) architecture for PROLOG and gives examples of Warren-machine (WAM) instructions, built-in functions, and unit clauses written using its instruction set. Two optimizations that allow dereferencing and trailing to be omitted frequently are applied to the RISC code, allowing it to execute 30% faster than unoptimized macro expansions of Warren-machine instructions. Using an instruction cache and a data cache, hand-optimized unit clauses are estimated to run at more than 1,700,000 logical inferences per second (LIPS), while a mixture of hand-optimized and macro-expanded RISC code should execute in the range of 200,000 to 700,000 LIPS. Hand-optimized RISC code is four times the size of corresponding WAM code; macro-expanded RISC code is seven times large." @default.
- W2000226983 created "2016-06-24" @default.
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- W2000226983 date "1989-01-01" @default.
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- W2000226983 title "A high-performance low risc machine for logic programming" @default.
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- W2000226983 doi "https://doi.org/10.1016/0743-1066(89)90035-6" @default.
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