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Matches in SemOpenAlex for { <https://semopenalex.org/work/W2000257128> ?p ?o ?g. }

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• W2000257128 abstract "Verifying timed circuits is a complex problem even when the delays of the system are fixed. This paper deals with a more challenging problem, the formal verification of timed circuits with unspecified delays represented as symbols. The approach discovers a set of sufficient linear constraints on the symbols that guarantee the correctness of the circuit. Experimental results from the area of asynchronous circuits show the applicability of the approach." @default.
• W2000257128 created "2016-06-24" @default.
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• W2000257128 date "2004-01-27" @default.
• W2000257128 modified "2023-09-26" @default.
• W2000257128 title "Verification of timed circuits with symbolic delays" @default.
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• W2000257128 doi "https://doi.org/10.5555/1015090.1015262" @default.
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