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• W2000532364 abstract "This paper demonstrates the possibility to use a bottom-up front-end (FE) architecture for sub-32 nm CMOS nodes with a new 3D approach in front-end flow. This architecture based on the so called FRETCH (film replacement etching through contact hole) solution [1] is compatible to adapt a specific device before or after electrical test. To address the full 3D in FE concept of buried integration will be proposed by using e-beam and HSQ material. Finally a novel integration scheme fully compatible with conventional bulk flow with one mask will be depicted allowing a self assembly structure and reducing significantly the process variability." @default.
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• W2000532364 date "2008-03-01" @default.
• W2000532364 modified "2023-10-07" @default.
• W2000532364 title "One mask architecture for 3D front-end integration" @default.
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• W2000532364 doi "https://doi.org/10.1109/ulis.2008.4527136" @default.
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