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- W2000557334 abstract "Scaling limits of the double-gate MOSFET structure are explored. Because short-channel effects can be adequately controlled by thinning the silicon body, the eventual scaling limit will be determined by the ability to control off-state leakage due to quantum mechanical tunneling and thermionic emission between the source and drain. Depending on threshold voltage and the source/drain doping profile, this will restrict gate length scaling to 5–11 nm. As power supplies are scaled down, maintaining on-state drive current may become difficult due to threshold voltage limitations. Series resistance becomes important as the body thickness is reduced, but intrinsic device performance may still be improved." @default.
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- W2000557334 date "2000-11-01" @default.
- W2000557334 modified "2023-10-16" @default.
- W2000557334 title "MOSFET scaling into the 10 nm regime" @default.
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- W2000557334 doi "https://doi.org/10.1006/spmi.2000.0933" @default.
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