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- W2000749249 abstract "In this paper, we analyze the design of sliding block Viterbi decoders in FPGA based on two proposed parallel Viterbi decoders with different area/performance ratios. Viterbi decoders for two wireless technologies were designed considering the proposed Viterbi decoders achieving reductions in resource utilizations of more than 50% compared to other state-of-the-art proposals1." @default.
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- W2000749249 date "2012-08-01" @default.
- W2000749249 modified "2023-09-25" @default.
- W2000749249 title "Sliding block Viterbi decoders in FPGA" @default.
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- W2000749249 doi "https://doi.org/10.1109/fpl.2012.6339215" @default.
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