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- W2000756192 abstract "Schottky Barrier Height (SBH) lowering at the source/drain contacts appears as an inescapable requirement for CMOS downscaling in the sub-20nm regime that legitimates metallic source/drain technology as a relevant solution. For that sake, we have developed a test structure which enables the extraction of the effective SBH by the combination of experimental data to a transport model taking into account thermionic and tunnel emission. In this study, we demonstrate the compatibility and the cumulative effects of two SBH lowering techniques: dopant segregation integration and wafer-based biaxial tensile strain." @default.
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- W2000756192 date "2012-10-01" @default.
- W2000756192 modified "2023-09-25" @default.
- W2000756192 title "Schottky Barrier Height reduction using strained silicon-on-insulator and dopant segregation" @default.
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- W2000756192 doi "https://doi.org/10.1016/j.mee.2012.05.045" @default.
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