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- W2000967300 abstract "The degradation of the read stability and write ability of static random-access memory (SRAM) is becoming a critical problem in deep submicrometer technology. To solve this problem, there are many SRAM cell design options such as preferred cells and assist circuits. In addition, extremely thin silicon-on-insulator (ETSOI) with a buried oxide offers an independent back-gate control. In this paper, previously proposed SRAM back-gate-assist circuit schemes are analyzed. From this, we propose a read-preferred SRAM cell with a write-assist circuit using the back-gate ETSOI. The proposed write-assist circuit minimizes the dynamic power overhead and satisfies a sufficient cell sigma in all cells during the read and write operations." @default.
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- W2000967300 date "2012-10-01" @default.
- W2000967300 modified "2023-09-26" @default.
- W2000967300 title "Read-Preferred SRAM Cell With Write-Assist Circuit Using Back-Gate ETSOI Transistors in 22-nm Technology" @default.
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- W2000967300 doi "https://doi.org/10.1109/ted.2012.2205693" @default.
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