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- W2000982605 abstract "A fully integrated CMOS linear RF power amplifier (PA) that includes integrated on-chip input and output matching networks is presented. This PA consists of two-stage configuration, each of which adopts a differential cascode structure. A new gate bias network of the common source amplifier is proposed to suppress intermodulation distortion. The results of the simulation and the measurements of the proposed bias circuit are compared and verified. The PA prototype is fabricated in Dongbu 0.11-μm 1-poly 8-metal CMOS process. The measured results were 29.4 dBm of P-1dB, 34 dB of power gain, a maximum PAE of 40% for a sinusoidal signal, and a peak PAE of 34% for a 900 MHz WCDMA-modulated signal." @default.
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- W2000982605 date "2014-10-01" @default.
- W2000982605 modified "2023-10-08" @default.
- W2000982605 title "A fully integrated CMOS linear power amplifier using an IMD-reduced bias network" @default.
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- W2000982605 doi "https://doi.org/10.1109/eumc.2014.6986672" @default.
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