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- W2001684108 abstract "A new Deep Trench Isolation (DTI) structure with high-voltage capability (BV > 150 V) and latch-up suppression (log(Ic/Ie) < −2 in adjacent pockets) is experimentally demonstrated in this work. The new DTI is implemented in a Nepi/BLN/N−/P+ Silicon stack by using a 0.18 μm CMOS-based platform. Moreover the advantages and design limitations of the new DTI are investigated by TCAD simulations and analytical models, being compared to its DTI predecessor in a Nepi/BLN/P−/P+ stack." @default.
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- W2001684108 date "2010-09-01" @default.
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- W2001684108 title "Next generation of Deep Trench Isolation for Smart Power technologies with 120V high-voltage devices" @default.
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- W2001684108 doi "https://doi.org/10.1016/j.microrel.2010.07.117" @default.
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