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- W2003149321 abstract "For neutron wavelengths resolved imaging, diffraction and reflectometry at next generation high-flux pulsed neutron sources three single-event counting detector types for very high rate and resolution are presently being developed in DETNI. This document is the result of a study aiming at the identification of an economical readout interface for the DETNI data acquisition (DAQ) boards, which shall be realizable with standardized and widespread used components, however fully meet the demanding data throughput requirements of 1 and 10 Gb/s in the test and data production phases, respectively. For these tasks, the 1 and 10 Gb Ethernet solutions discussed below were found as easiest compliant with the Xilinx Virtex-4 FPGA technology used on the DETNI readout boards on the sender side. On the receiver side standard and high-end PC configurations are foreseen for the test and production phases, respectively. In the latter phase with a data rate of 100 Mevents/s a data stream from the front-end FPGA board to the PC of 800 MB/s list-mode data in 64-bit blocks packed in jumbo frames is foreseen." @default.
- W2003149321 created "2016-06-24" @default.
- W2003149321 creator A5081680274 @default.
- W2003149321 date "2006-01-01" @default.
- W2003149321 modified "2023-10-02" @default.
- W2003149321 title "1 and 10 Gigabit Ethernet Readout Interfaces for DETNI" @default.
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- W2003149321 doi "https://doi.org/10.1109/nssmic.2006.356217" @default.
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