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- W2003245093 abstract "Clock distribution networks consume a significant portion of on-chip power. Traditional buffered clock distribution power is limited by frequency, capacitance, and activity rates. Resonant clock distributions can reduce this power by recycling energy on-chip and reducing the overall clock power. This tutorial introduces recent techniques for distributed-LC, traveling wave, and standing wave resonant clock distributions. In particular, the tutorial discusses the recent developments and open research problems. The tutorial covers both circuits, computer-aided design algorithms and methodologies for resonant clocking." @default.
- W2003245093 created "2016-06-24" @default.
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- W2003245093 date "2012-11-05" @default.
- W2003245093 modified "2023-09-26" @default.
- W2003245093 title "High-performance, low-power resonant clocking" @default.
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- W2003245093 doi "https://doi.org/10.1145/2429384.2429545" @default.
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