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- W2003402145 abstract "A TD-SCDMA transceiver is integrated in a 0.18 μm CMOS process. The RX achieves 62dB voltage gain, 3.2dB NF, and -14.5dBm IIP3. The TX achieves 3.7% EVM with -46dBc ACLR at +4.4dBm maximum output power. On-chip fractional-N PLL has 0.85° jitter and spurs below 77dB. The RX and TX consume 95mW and 158mW, respectively." @default.
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- W2003402145 date "2007-02-01" @default.
- W2003402145 modified "2023-09-27" @default.
- W2003402145 title "A Dual-Band CMOS Transceiver for 3G TD-SCDMA" @default.
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- W2003402145 doi "https://doi.org/10.1109/isscc.2007.373435" @default.
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