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- W2003404073 abstract "It is essential to control supply voltage V/sub DD/ and threshold voltage V/sub TH/ for low power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control V/sub DD/ and V/sub TH/ are introduced. A simple theory to compute optimum multiple V/sub DD/ and V/sub TH/ values is described. Scaling scenarios of variable and/or multiple V/sub DD/ and V/sub TH/ values is discussed to show future technology directions." @default.
- W2003404073 created "2016-06-24" @default.
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- W2003404073 date "2002-01-01" @default.
- W2003404073 modified "2023-09-28" @default.
- W2003404073 title "Optimization and control of VDD and VTH for low-power, high-speed CMOS design" @default.
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- W2003404073 doi "https://doi.org/10.1145/774572.774577" @default.
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