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- W2003619666 abstract "In this paper, a new lumped element latchup model which includes two extra bipolar transistors is proposed. The divergence between the results of the conventional and the proposed model is explained in terms of the circuit parameters. An analytical model for the latchup triggered by the voltage transient at the power supply is presented and the predictions of the model are computed and compared to the analytical results of the conventional model and the simulation results using SPICE." @default.
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- W2003619666 date "1987-12-01" @default.
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- W2003619666 title "Transient analysis for a new CMOS latchup model" @default.
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- W2003619666 doi "https://doi.org/10.1016/0038-1101(87)90060-8" @default.
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