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- W2004192642 abstract "In this paper we introduce a fine-grain fault diagnosis approach for reconfigurable logic blocks. As opposed to previous works, we propose to reuse rather than to discard defective blocks. We describe methods to analyze deeper a defective Xilinx Virtex2Pro slice and diagnose the fault, out of a set of 150, that causes the malfunction. The outcome of the fault diagnosis is subsequently used to characterize the defective slice functionality and then match it with a suitable design configuration. The proposed methods are implemented and prototyped in a Virtex2Pro-30. A single-phase fault diagnosis covers 95% of the faults and takes 170-390 nsec to test a single slice and 27-62 μsec for a frame of 160 slices. A two-phase approach uses reconfiguration and covers the entire set of faults requiring up to 8.5 μsec and 80 μsec for a single slice and an entire frame, respectively." @default.
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- W2004192642 date "2010-12-01" @default.
- W2004192642 modified "2023-09-23" @default.
- W2004192642 title "Fine-grain fault diagnosis for FPGA logic blocks" @default.
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- W2004192642 doi "https://doi.org/10.1109/fpt.2010.5681773" @default.
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