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- W2004227611 abstract "This paper presents a performance evaluation between hardware and software implementation of a probabilistic parallel genetic algorithm. The compact genetic algorithm is extended to support parallel implementation. The parallelized compact genetic algorithm is implemented in FPGA hardware and parallelized software version running on multicore processors for performance evaluation using standard benchmark functions. The experimental results show that the hardware implementation of the parallel compact genetic algorithm delivers speedup of between 100-fold to 500-fold depending on problems size and number of generations." @default.
- W2004227611 created "2016-06-24" @default.
- W2004227611 creator A5032425162 @default.
- W2004227611 date "2013-09-01" @default.
- W2004227611 modified "2023-10-16" @default.
- W2004227611 title "A performance evaluation of a probabilistic parallel genetic algorithm: FPGA vs. multi-core processor" @default.
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- W2004227611 doi "https://doi.org/10.1109/icsec.2013.6694797" @default.
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