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- W2005371421 abstract "A model is presented for the parasitic SCR in bulk CMOS. The model shows the exact way that the shunting resistances alter the terminal V-I characteristics. It describes a negative differential resistance (NDR) range which is the only requirement for latch-up if certain biasing conditions are met. The NDR region will start when the product of current and shunting resistance equals the built in voltage and will occur for a n + a p n β p < 1). The conditions for the center junction to become forward biased are given. If these conditions are met, the SCR will latch-up. If these conditions are not met, latch-up becomes dependent on the biasing circuit." @default.
- W2005371421 created "2016-06-24" @default.
- W2005371421 creator A5071019681 @default.
- W2005371421 date "1980-01-01" @default.
- W2005371421 modified "2023-09-27" @default.
- W2005371421 title "A model for the parasitic SCR in bulk CMOS" @default.
- W2005371421 doi "https://doi.org/10.1109/iedm.1980.189807" @default.
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