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- W2006508725 abstract "Two high-speed direct digital frequency synthesizers (DDFS) have been fabricated in CMOS 0.25 /spl mu/m technology. Both DDFS provides two quadrature phase 12 bit outputs with a spectral purity of 80 dBc. The first circuit reaches a maximum operating frequency of 600 MHz. The second circuit operates up to 480 MHz clock speed while dissipating only 72 /spl mu/W/MHz. The proposed circuits employ an innovative high-speed architecture for sine and cosine functions approximation, based on a hardware-effective linear interpolation approach name as dual-slope." @default.
- W2006508725 created "2016-06-24" @default.
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- W2006508725 date "2004-11-30" @default.
- W2006508725 modified "2023-09-25" @default.
- W2006508725 title "High-speed direct digital frequency synthesizers in 0.25-μm CMOS" @default.
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- W2006508725 doi "https://doi.org/10.1109/cicc.2004.1358764" @default.
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