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Matches in SemOpenAlex for { <https://semopenalex.org/work/W2007180868> ?p ?o ?g. }

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• W2007180868 abstract "A 3-dimensional double stacked 4 gigabit multilevel cell NAND flash memory device with shared bitline structure have successfully developed. The device is fabricated by 45 nm floating-gate CMOS and single-crystal Si layer stacking technologies. To support fully compatible device performance and characteristics with conventional planar device, shared bitline architecture including Si layer-dedicated decoder and Si layer-compensated control schemes are also developed. By using the architecture and the design techniques, a memory cell size of 0.0021 mum <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> /bit per unit feature area which is smallest cell size and 2.5 MB/s program throughput with 2 kB page size which is almost equivalent performance compared to conventional planar device are realized." @default.
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• W2007180868 date "2009-01-01" @default.
• W2007180868 modified "2023-10-14" @default.
• W2007180868 title "A Fully Performance Compatible 45 nm 4-Gigabit Three Dimensional Double-Stacked Multi-Level NAND Flash Memory With Shared Bit-Line Structure" @default.
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• W2007180868 doi "https://doi.org/10.1109/jssc.2008.2006437" @default.
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